Software Engineer II: Hardware Verification Compiler

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence Design Systems Inc. is looking for a motivated Software Engineer II: Hardware Verification Compiler to work with us in Belo Horizonte, Brazil. At Cadence, we hire and develop leaders and innovators who want to impact the world of technology. Cadence has been nominated as a Great Place to Work globally and in Brazil and is also a Fortune 100 Best Companies to Work For . As a Software Engineer II: Hardware Verification Compiler , you will join the Front-End Compiler team, which is part of the Hardware System Verification Group in Belo Horizonte, Brazil. This team develops compiler technologies that enable hardware-assisted verification solutions for platforms such as Palladium and Protium . To learn more about the broader technology area, visit Cadence Verification Solutions , with a focus on hardware-assisted verification. Working at Cadence is dynamic, fast-paced, and highly collaborative, with close integration across teams around the world. Job Description: Developing maintainable, high-quality C/C++ code for an HDL language-based compiler and runtime support. Development of HDL compiler front-end for System Verilog. Improve compiler performance, infrastructure, and flows. Exposure to RTL simulation/synthesis and runtime environment. Be a part of cross geography team and contribute to product enhancement. Requirements: Complete Bachelor's degree in computer science or computer Engineering or related fields with 3+ years of experience Complete Master’s degree in computer science or computer Engineering or related fields. Work experience with C/C++ programming language. Compilers area knowledge and expertise. Knowledge and experience with Object-oriented programming. Solid advanced data structures and algorithms knowledge. Experience with Unix environment Very good spoken and written English and Portuguese. Nice to have: Experience developing software using version control systems. Experience with scripting environments - either Tcl or Python. Knowledge/Experience with Formal verification and/or simulation. Knowledge/Experience EDA and VLSI design, including Verilog, System Verilog and VHDL languages. Additional Job Details: Employment category: CLT Employment term: 40 hours/week. Competitive benefits. Location: Av Contorno 5800, Belo Horizonte, Minas Gerais Brazil. About Cadence Design Systems: Cadence is the only company that provides the expertise and tools, IP, and hardware required for the entire electronics design chain, from chip design to chip packaging to boards and to systems. We enable electronic systems and semiconductor companies to create innovative products that transform the way people live, work, and play. Our products are used in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. For more information, access http://www.cadence.com We’re doing work that matters. Help us solve what others can’t.