lead Design Engineer
Cadence
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3,610 open design roles across 340 companies are on ApplySarthi right now, most of them in Bengaluru (325), Hyderabad (124), Chennai (52).
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What design roles keep asking for: Python (20%) — counted across their open postings here.
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Questions you are likely to be asked
- Why do you want to join Cadence?
- What is your experience with Perl? Tell me one thing you learned the hard way.
- How would you design an API for a feature you have worked on?
- What do you do when a production issue happens on your code?
- Walk me through a system you built. How was it designed, and what would you change now?
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Practise the lead Design Engineer at Cadence interview free →At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Circuit Pathfinding Engineer The Technology Pathfinding team within the Silicon Solutions Group ensures that our analog mixed-signal (AMS) IP products take maximum advantage of process technology offerings and roadmap from foundries. To do this, we have expertise in technology analysis, design technology co-optimization (DTCO), circuit design and optimization. AI and HPC products demand increasing compute power, higher memory bandwidth and faster chip to chip communication. We work with foundries and our IP design teams to chart the path that gets us there. Join us if you enjoy working with cutting-edge technology nodes (2nm and lower), designing high-speed analog circuits, and hunting down optimizations that improve performance, power and area (PPA). Role: Circuit design of key AMS circuits to benchmark and optimize PPA in an early stage/experimental technology setting Analyze complex PPA trade-offs related to timing, power, area and reliability Evaluate advanced process development kits (PDKs) from a design and competitiveness viewpoint Conduct DTCO on technology features and foundation IP to maximize PPA Requirements: Bachelors degree in Science/Engineering with 2-5 years of industry experience OR Masters degree in Science/Engineering with 1-4 years of industry experience Industry experience in analog circuit design and layout, preferably on advanced technology nodes Academic coursework on analog design from a reputed university covering CMOS/GAA fundamentals, device-technology interaction such as layout dependent effects and factors affecting circuit PPA Familiarity with industry tools for analog and custom design such as simulation tools (Spectre, Hspice), custom design (Virtuoso, Custom Compiler), and reliability (Voltus, Redhawk) Programming skills in a scripting language like Python, TCL, Perl, etc. Experience in using and building AI agentic flows is a plus. We’re doing work that matters. Help us solve what others can’t.
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Listed on workday · posted 2026-11-11. ApplySarthi collects openings and links to application pages; the role is advertised by Cadence, not by us.