Senior Analog EDA/CAD ASIC Engineer
Nokia
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This role on the market
231 open analog roles across 19 companies are on ApplySarthi right now, most of them in Bengaluru (34), Hyderabad (9), Delhi NCR (7).
- Senior/Staff Engineer, Analog LayoutMarvell
- Analog Design Flow and Infrastructure Design Automation ManagerIntel · bengaluru
- Principal/MTS, Analog Design EngineeringMicron
- Lead Analog Layout EngineerCiena
- Analog Design InternAnalogdevices · bengaluru
What analog roles keep asking for: Python (20%), MATLAB (15%) — counted across their open postings here.
Nokia has 582 open roles listed here.
- FPGA Verification Engineer
- Software Supply Concept Owner
- Partner Sales Manager
- Automation Trainee
- Electrical Contract Manufacturer Support Engineer
Counted across 14 company job boards, updated as roles open and close.
Preparing for this interview
Interviews for analog roles keep coming back to Python, MATLAB. Practise those questions before you sit with Nokia.
Questions you are likely to be asked
- Why do you want to join Nokia?
- What is your experience with Linux? Tell me one thing you learned the hard way.
- Walk me through a system you built. How was it designed, and what would you change now?
- Tell me about a hard bug you tracked down. How did you find the cause?
- How do you decide what to test, and what does good code review look like to you?
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Practise the Senior Analog EDA/CAD ASIC Engineer at Nokia interview free →High-Speed Analog EDA/CAD Engineer: Brief Description: Full-time position. Infinera is seeking an EDA/CAD Engineer to support SiGE and CMOS research & development and chip design in the Optical Modules Group (OMG) located in Sunnyvale, CA. Description: Infinera is seeking an EDA/CAD Engineer to support and develop SiGe and CMOS design solutions for the high speed analog ASIC design team. The engineer will be hands-on with all phases of tool flow including foundry interface, PDK installation and support, tool evaluation and installation, layout, archive and tapeout. The engineer must be an expert in analog and mixed-signal circuit design flows and tools. Tasks will include significant tool and PDK customization and design team support. The self-motivated engineer must be able to anticipate problems and devise effective solutions. Responsibilities: Install, customize and support external vendor PDK’s for both SiGe and CMOS processes Install, customize and support Custom IC and RF CAD environment for the design of high-speed (10–40 Gb/s), broad-band, mixed-signal, integrated circuits for fiber-based wireline applications. Lead and contribute to the development of design standards, IC development processes, CAD tools and design flows. Execute and support layout efforts including archive and tapeout processes Minimum Expertise Requirements: Expert in high-speed analog and mixed-signal IC design concepts and must demonstrate superior critical thinking skills, problem solving capabilities and engineering judgment. Fluent with analog EDA front and back end tools Cadence Virtuoso, ADE Strong SKILL programming a must Mentor Calibre (end user support and rule deck writing) Detailed understanding of advanced high-speed analog & mixed-signal layout concepts FlexLM license management Strong UNIX/Linux knowledge Not required but preferred Perforce Ocean scripting and advanced modelling and simulation knowledge Linux OS support Minimum Experience Requirements: 5 years of experience working as a high-speed analog & mixed signal IC CAD professional is required IC Technologies: High-speed IC technologies, including CMOS and bipolar. IC Design Software: Experience with configuring, documenting, and maintaining high speed analog IC design flows is a must. Experience with transistor-level IC design and verification software, e.g. Cadence Composer, Cadence Virtuoso, Cadence Spectre, Virtuoso AMS, Mentor Calibre, Skill language, is a must. General understanding of digital physical design flows, e.g. RTL coding, place and route, DRC/LVS verification. Work Environment: Comfortable working in a fast-paced environment. Must be strong individual contributor, and also able to work as member of a small team. Must be able to support EPDA users and solve problems efficiently, effectively and rapidly. Education Requirements: BS 5+ years MS 4+ years PhD 3+ years 5 years of experience working as a high-speed analog & mixed signal IC CAD professional is required IC Technologies: High-speed IC technologies, including CMOS and bipolar. IC Design Software: Experience with configuring, documenting, and maintaining high speed analog IC design flows is a must. Experience with transistor-level IC design and verification software, e.g. Cadence Composer, Cadence Virtuoso, Cadence Spectre, Virtuoso AMS, Mentor Calibre, Skill language, is a must. General understanding of digital physical design flows, e.g. RTL coding, place and route, DRC/LVS verification. Work Environment: Comfortable working in a fast-paced environment. Must be strong individual contributor, and also able to work as member of a small team. Must be able to support EPDA users and solve problems efficiently, effectively and rapidly.
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Listed on oraclehcm · posted 2026-06-19. ApplySarthi collects openings and links to application pages; the role is advertised by Nokia, not by us.