Mixed Signal Circuit Design Coop
Nokia
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This role on the market
89 open circuit roles across 17 companies are on ApplySarthi right now, most of them in Bengaluru (20), Hyderabad (11), Chennai (3).
- Analog Circuit Design EngineerIntel · bengaluru
- Principal HBM Architecture & Circuit Design EngineerMicron
- Stage Ingénieur : Conception Numérique IP et Circuit Intégrés (F/H)Nxp
- Experienced or Senior Digital Circuit Card Assembly (CCA) Design EngineerBoeing
- Senior Circuit DesignerNvidia
What circuit roles keep asking for: Python (30%), Perl (16%) — counted across their open postings here.
Nokia has 604 open roles listed here.
- MS Specialist OSS
- Staff SW Develop Engr
- Senior Software Developer
- IT Solution Architect - SAP SD/WM
- MS Specialist OSS
Counted across 14 company job boards, updated as roles open and close.
Preparing for this interview
Interviews for circuit roles keep coming back to Python, Perl. Practise those questions before you sit with Nokia.
Questions you are likely to be asked
- Why do you want to join Nokia?
- How do you work with developers so the build matches the design?
- How do you balance what users ask for with what the business needs?
- Walk me through a design from your portfolio, from the problem to the result.
- Tell me about design feedback you disagreed with. What happened?
Prep Sarthi gives you a free mock interview: an AI interviewer asks you questions like these out loud, from your own CV and this job, and shows your score and your weakest answer.
Practise the Mixed Signal Circuit Design Coop at Nokia interview free →Number of Position(s): 2 Duration: 4+ months Dates: January 2027 - May 2027 Location: Onsite in San Jose, CA Educational Requirements Currently a candidate for a master's degree or PhD in Electrical Engineering, Computer Engineering, or a related field with an accredited school in the US. Familiarity with essential CAD tools, such as Cadence Virtuoso, Spectre, Incisive, Calibre, EMX, and Totem EM/IR, etc. Familiarity with analog / mixed signal IPs or chips in deep submicron CMOS technologies. Good understanding of device physics and the impacts of layout effects; Familiarity with behavioral modeling the blocks and circuits with Verilog-A or Verilog-AMS
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Listed on oraclehcm · posted 2026-10-06. ApplySarthi collects openings and links to application pages; the role is advertised by Nokia, not by us.