ApplySarthiASIC Engineer
Jane Street
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Read from the description itself, not inferred.
This role on the market
325 open asic roles across 20 companies are on ApplySarthi right now, most of them in Bengaluru (42), Hyderabad (20), Pune (3).
- ASIC and Custom Silicon Sales Account Manager for Asia Pacific & Japan (APJ)Intel
- Experienced ASIC-FPGA Verification EngineerBoeing · bengaluru
- Senior ASIC Cost Analyst, Silicon OperationsAmazon
- ASIC Reliability Analysis (RA) EngineerMicron · hyderabad
- ASIC Design EngineerBroadcom
What asic roles keep asking for: Python (54%), Perl (33%), C++ (24%) — counted across their open postings here.
C++ jobs · Java jobs · Python jobs
Jane Street has 217 open roles listed here.
- Events Coordinator
- Formal Methods Research and Development
- Formal Methods Research and Development
- Machine Learning Compiler Engineer
- Machine Learning Compiler Engineer
Counted across 14 company job boards, updated as roles open and close.
Preparing for this interview
Interviews for asic roles keep coming back to Python, Perl, C++. Practise those questions before you sit with Jane Street.
Questions you are likely to be asked
- Why do you want to join Jane Street?
- What is your experience with C++? Tell me one thing you learned the hard way.
- Describe a time a deadline forced a trade-off in quality. What did you choose and why?
- How would you design an API for a feature you have worked on?
- What do you do when a production issue happens on your code?
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Practise the ASIC Engineer at Jane Street interview free →About the position
We are looking to hire an experienced ASIC Engineer to help us design, test and deploy advanced hardware designs. As part of our Ultra Low Latency team, you’ll have the opportunity to collaborate with people in areas across the firm, including trading, networking and research infrastructure. We are looking for someone who can contribute to all of our projects and be happy to work on both FPGA-based and ASIC-based technologies.
We’re big believers in the ability of tools to improve the productivity, reliability and day-to-day joy of hardware engineering. That’s why we created Hardcaml, a hardware development toolchain embedded in OCaml. We don’t expect you to know OCaml (we’ll teach you here), but we are looking for hardware engineers who are excited about the advantages that better tools can bring, and are willing to try new things as a result.
About you
- 4+ years of practical experience in RTL design and verification, with a significant focus on ASIC design verification.
- Experience verifying ASIC designs using either Synopsys or Cadence tools.
- Experience applying software engineering techniques to improve the hardware design process and programming in high-level languages such as Python, C++, Java, or Haskell.
- Additional (preferred) experience in any of the following; formal verification, front-end RTL design and synthesis, or back-end physical design.
- Fluent in English
If you're a recruiting agency and want to partner with us, please reach out to agency-partnerships@janestreet.com.
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Listed on greenhouse · posted 2025-10-29. ApplySarthi collects openings and links to application pages; the role is advertised by Jane Street, not by us.