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Sr. Principal Product Engineer, RTL-GDSII

Cadence

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Questions you are likely to be asked

  1. Why do you want to join Cadence?
  2. What do you do when a production issue happens on your code?
  3. Walk me through a system you built. How was it designed, and what would you change now?
  4. Tell me about a hard bug you tracked down. How did you find the cause?
  5. How do you decide what to test, and what does good code review look like to you?

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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. This position presents an exciting opportunity within Cadence’s Digital and Signoff Group (DSG) for a Product Engineer. In this dynamic environment, you’ll collaborate closely with R&D, Application Engineering & product marketing teams to help drive the development of advanced chip design software tools. Your responsibilities will include: Provide place-and-route expertise to both Cadence customers and internal development teams PPA benchmarking on customer and foundry test cases Evaluate impact of new features on PPA Be a liaison for new features between customer/foundry and R&D development teams Develop point solutions with scripting Data mining and analysis to uncover PPA limiting issues and identify optimization opportunities Minimum Qualifications: A Bachelor or Master’s degree in EE/CS or equivalent major (Masters level preferred) A minimum of 10 years of hands on experience with any industry standard place-and-route tools (7 years with Master Degree) A good understanding of the RTL-GDSII flow A good understanding of the PDK and DK collaterals Firm understanding of Timing and power analysis Good scripting skills Must be legally eligible to work in the US We’re doing work that matters. Help us solve what others can’t.

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Listed on workday · posted 2026-09-22. ApplySarthi collects openings and links to application pages; the role is advertised by Cadence, not by us.