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Senior ASIC Design Engineer

Nvidia

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3,614 open design roles across 340 companies are on ApplySarthi right now, most of them in Bengaluru (325), Hyderabad (124), Chennai (52).

What design roles keep asking for: Python (20%) — counted across their open postings here.

Asic Design Engineer jobs in the United States

Nvidia has 3,820 open roles listed here.

Counted across 14 company job boards, updated as roles open and close.

Preparing for this interview

Interviews for design roles keep coming back to Python. Practise those questions before you sit with Nvidia.

Questions you are likely to be asked

  1. Why do you want to join Nvidia?
  2. Tell me about a hard bug you tracked down. How did you find the cause?
  3. How do you decide what to test, and what does good code review look like to you?
  4. Describe a time a deadline forced a trade-off in quality. What did you choose and why?
  5. How would you design an API for a feature you have worked on?

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Practise the Senior ASIC Design Engineer at Nvidia interview free →

NVIDIA is looking for an outstanding Senior ASIC Design Engineer to build and implement leading SoCs and GPUs. This role offers a chance to create real impact in a dynamic, tech-driven company. The products range from consumer graphics to self-driving cars and the fast-growing field of artificial intelligence. Our team consists of outstanding people worldwide, working to push the boundaries of what is possible today and define the future of computing. What you’ll be doing: As a key member of our design team, you will be responsible for the micro-architecture and build implementation of GPU memory systems units such as caches, coherency, complex pipelines, arbiters, or interconnect networks. Micro-architect features to meet area, performance, and power requirements. Deliver a fully verified build by working closely with verification engineers. Deliver a synthesis/timing clean build to ensure a routable and physically implementable design. Collaborate with architects, verification engineers, software engineers, and physical build engineers to accomplish your goals. What we need to see: Bachelor's or Master’s Degree in Electrical Engineering or Computer Engineering, or equivalent experience. 8+ years of experience delivering design/RTL for complex IPs from inception through tapeout. Prior experience building arbiters, shared buffers, virtual channels, interconnection routing policies/deadlock avoidance,. Highly proficient in logic design, Verilog, and/or System-Verilog, with a solid understanding of Computer Architecture. A deep understanding of ASIC flow including RTL, verification, logic synthesis, timing analysis, ECO.. Proficiency in developing/using AI workflows and/or autonomous agents for design methodologies. Strong interpersonal and communication skills to collaborate across teams. Good debugging and analytical skills. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5. You will also be eligible for equity and benefits . Applications for this job will be accepted at least until August 14, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

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Listed on workday · posted 2026-09-11. ApplySarthi collects openings and links to application pages; the role is advertised by Nvidia, not by us.