R&D Engineer IC Design 5
Broadcom
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This role on the market
3,688 open design roles across 348 companies are on ApplySarthi right now, most of them in Bengaluru (334), Hyderabad (124), Chennai (54).
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What design roles keep asking for: Python (20%) — counted across their open postings here.
Broadcom has 435 open roles listed here.
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Counted across 14 company job boards, updated as roles open and close.
Preparing for this interview
Interviews for design roles keep coming back to Python. Practise those questions before you sit with Broadcom.
Questions you are likely to be asked
- Why do you want to join Broadcom?
- What is your experience with C++? Tell me one thing you learned the hard way.
- How would you design an API for a feature you have worked on?
- What do you do when a production issue happens on your code?
- Walk me through a system you built. How was it designed, and what would you change now?
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Practise the R&D Engineer IC Design 5 at Broadcom interview free →Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: This individual will be a key member of the ASIC system-level verification team. Responsibilities include developing complex verification environments, creating comprehensive test plans, and verifying high-performance network switch ASIC/FPGAs. The role involves hands-on implementation across every aspect of ASIC verification while collaborating closely with system architects, design engineers, and verification teams. The ideal candidate will have a proven track record of completing multiple successful ASIC design and verification cycles—from architecting testbenches (networking background preferred) to achieving full verification closure. Education & Experience Experience: 8+ years of ASIC design/verification experience, including a complete understanding of Verilog design and hands-on experience with C/C++. Education: Bachelor's in Engineering Methodologies & Languages: Strong working knowledge of object-oriented programming (OOP) and modern ASIC verification flows (e.g., UVM/SystemVerilog). Technical Depth: Complete mastery of Verilog for simulation and familiarity with ASIC design flows for deep sub-micron technologies. Domain Knowledge: Experience with networking protocols (e.g., Ethernet, PCIe, routing/switching) is a major plus. Track Record: Must have completed multiple ASIC tape-outs, with at least one project taken from initial concept through full production. Communication: Fully comfortable with technical and business English across documentation, cross-functional collaboration, and executive communications. Compensation and Benefits The annual base salary range for this position is USD 143,800.00 To USD 230,000.00 As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements. Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence. Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law. If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
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Listed on workday · posted 2026-10-13. ApplySarthi collects openings and links to application pages; the role is advertised by Broadcom, not by us.