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Principal Application Engineer (STA - SignOff)

Cadence

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1,466 open application roles across 216 companies are on ApplySarthi right now, most of them in Bengaluru (117), Hyderabad (105), Delhi NCR (71).

What application roles keep asking for: Java (18%), Python (18%), Agile (17%), SQL (12%) — counted across their open postings here.

Application Engineer jobs in the United States · Perl jobs · Python jobs

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Counted across 14 company job boards, updated as roles open and close.

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Questions you are likely to be asked

  1. Why do you want to join Cadence?
  2. What is your experience with Perl? Tell me one thing you learned the hard way.
  3. How do you decide what to test, and what does good code review look like to you?
  4. Describe a time a deadline forced a trade-off in quality. What did you choose and why?
  5. How would you design an API for a feature you have worked on?

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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. We are looking for a Principal Application Engineer responsible for providing pre-sales and post-sales technical support for the Digital Implementation and Signoff tools. The candidate will work closely with sales executives in supporting sales campaigns by delivering workshops, benchmarks, product demonstrations, methodology consultations and product support. Position also involves: • Presenting to customers the technical capabilities of Cadence Digital Implementation and Signoff tools and flows (Synthesis, Place and Route, Timing/Physical/Power Signoff). • Recognizing opportunities for products at existing customers or potential customers, and working with account team to define and execute technical campaigns • Support technical evaluations/benchmarks and drive the process to deliver Cadence solutions implementations • Ongoing support and usage proliferation at existing customers (on/offsite) • Working closely with R&D on tools and methodology improvements • Create and contribute technical content for Cadence Online Support • Travel as required (up to 20%) The Position Requirements are… Strong knowledge of Digital Design Fundamentals, Semiconductor fundamentals and Static Timing Analysis is required Experience with ASIC digital implementation flows and tools is a plus Working knowledge of a scripting language TCL/Perl/Python Minimum BS-EE plus 8 to 10 year’s experience or MS-EE plus 6 to 8 year’s experience Core timing signoff expertise, advanced node STA, UPF & constraints debugging, hierarchical & 3DIC design STA and closure solutions Candidate should have strong customer-facing communication and problem solving skills Strong personal drive for continuous learning and expanding professional skill sets Strong verbal and written communication skills The annual salary range for California (Other than San Jose) is $116,200 to $215,800. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure.Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more. We’re doing work that matters. Help us solve what others can’t.

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Listed on workday · posted 2026-10-15. ApplySarthi collects openings and links to application pages; the role is advertised by Cadence, not by us.