ASIC Design and STA Engineer
Nvidia
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This role on the market
3,615 open design roles across 340 companies are on ApplySarthi right now, most of them in Bengaluru (325), Hyderabad (124), Chennai (52).
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What design roles keep asking for: Python (20%) — counted across their open postings here.
Nvidia has 3,820 open roles listed here.
- Software Developer - Networking
- Manager, Silicon Circuit and Power Integrity - Silicon Co-Design Group
- Senior Physical Design Methodology Engineerbengaluru
- Electro Optics Student
- Manager, Software Verification
Counted across 14 company job boards, updated as roles open and close.
Preparing for this interview
Interviews for design roles keep coming back to Python. Practise those questions before you sit with Nvidia.
Questions you are likely to be asked
- Why do you want to join Nvidia?
- What is your experience with Excel? Tell me one thing you learned the hard way.
- How would you design an API for a feature you have worked on?
- What do you do when a production issue happens on your code?
- Walk me through a system you built. How was it designed, and what would you change now?
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Practise the ASIC Design and STA Engineer at Nvidia interview free →NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life’s work , to amplify human creativity and intelligence. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join our diverse team and see how you can make a lasting impact on the world! NVIDIA is looking for a best-in-class ASIC STA Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency for today's AI platforms! Come and take a part in designing our groundbreaking large scale and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company. What you will be doing: Be in charge of full chip and/or chiplet level STA convergence from early stages to signoff. Take part in top level floor plan and clock planning. Optimize, together with CAD signoff flows and methodologies. Digital Partitions' and analog IPs' timing integration, giving feedback to PD/RTL and driving convergence. Work closely with logic design and DFT engineers to define and implement constraints for the various work modes, including their optimization for runtime and efficiency. What we need to see: B.SC./ M.SC. in Electrical Engineering/Computer Engineering. 3+ years of experience in physical design and STA Proven experience in RTL2GDS and STA design and convergence Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.) Hands on STA experience from early stages to signoff using Synopsis Primetime. Deep knowledge in timing concepts required. Great teammate. NVIDIA has some of the most forward-thinking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best physical design team in the industry! #LI-Hybrid
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Listed on workday · posted 2026-10-12. ApplySarthi collects openings and links to application pages; the role is advertised by Nvidia, not by us.