Principal Debug Validation Engineer
Graphcore
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This role on the market
342 open validation roles across 54 companies are on ApplySarthi right now, most of them in Bengaluru (32), Delhi NCR (11), Pune (8).
- Software Student for x86 Validation ToolsIntel
- Claims Validation HandlerMarshmallow
- Data Validation SpecialistAddepar1
- Senior Test and Validation EngineerCarrier
- Qualification and Validation EngineerAbbott
What validation roles keep asking for: Python (26%), Linux (15%) — counted across their open postings here.
C++ jobs · Linux jobs · Python jobs
Graphcore has 180 open roles listed here.
- Director Of Product Engineering
- Systems Engineer
- Senior System Tests & Diagnostics Engineer
- Staff PCB Layout Engineer
- Staff System Tests & Diagnostics Engineer
Counted across 14 company job boards, updated as roles open and close.
Preparing for this interview
Interviews for validation roles keep coming back to Python, Linux. Practise those questions before you sit with Graphcore.
Questions you are likely to be asked
- Why do you want to join Graphcore?
- What is your experience with C++? Tell me one thing you learned the hard way.
- What do you do when a production issue happens on your code?
- Walk me through a system you built. How was it designed, and what would you change now?
- Tell me about a hard bug you tracked down. How did you find the cause?
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Practise the Principal Debug Validation Engineer at Graphcore interview free →Principal Embedded SW/FW Engineer (Bringup) - Austin, Tx, USA
Job Summary
We have an exciting opportunity to be part of a collaborative, cross-functional development team validating cutting-edge, high-performance AI chips and platforms.
You will play a key role in supporting new product introductions and post-silicon validation.
Working within the Post-Silicon Validation team, you will be involved with bringing first silicon to life, functionally validating it and working closely with many other teams to help it become a fully characterised and working product, reporting project status/progress to program management on a regular basis. You will have the opportunity to provide technical guidance to other engineering team members. In this role, you can leverage our experience and industry knowledge to architect and drive implementation of continuous improvements to test infrastructure and processes.
The Team
The Post-Silicon Bringup team sits within the Architecture and Validation team, we are responsible for bringup and validation of new silicon when it returns from manufacture, enabling and supporting the production SW and FW teams to bring up their software and supporting the Silicon Characterisation team.
Responsibilities and Duties
- Plan, design, develop and debug silicon validation tests in bare metal C/C++ on FPGA/Emulator prior to first silicon
- Deploy silicon validation tests on first silicon and debugging them
- Develop automated test framework and regression test suites in Python to optimize validation efficiency
- Collaborate closely with engineers from many other disciplines on a variety of topics
- Work with Validation and Production Test engineering peers to implement best practices and continuous improvements to test methodologies
- Analyse test results, identify and debug failures/defects
- Contribute to shared test and validation infrastructure
- Provide feedback to architects
Candidate Profile
Essential:
- Understanding of ML applications and their workloads
- A self-starter who can apply independent judgement
- A team player able to lead and support colleagues with difficult concepts
- Strong experience in Bare metal / embedded C/C++
- Excellent problem-solving, analytical & diagnostic skills
- Ability to work across teams and programming languages to find root causes of critical and complex issues
- Experience of the post-silicon validation process applied in digital ASIC environments
- Python, Linux
- Excellent communication skills and the ability to explain difficult concepts to resolve issues
Desirable
- 5 to 10 years’ experience
- Experience building and leading, multi-site teams
- Driver level experience with one or more of the following is highly desirable:
- PCIe
- Ethernet
- Memory technologies (LPDDR, DDR, HBM, …)
- Other peripherals such as I2C, I3C, SPI, …
- Good knowledge of mixed-signal building blocks such as PLLs, high speed PHYs and IC control/communication protocols is highly desirable.
- Experience of Arm CPUs, System IP and debug tools.
- Experience of AMBA protocols.
- Experience in Characterization, Failure Analysis, Test Development, Statistical analysis,
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Listed on greenhouse · posted 2026-06-25. ApplySarthi collects openings and links to application pages; the role is advertised by Graphcore, not by us.