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Design Verification Engineer, Silicon and Systems Group

ADCI - BLR 14 SEZ

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533 open verification roles across 51 companies are on ApplySarthi right now, most of them in Bengaluru (112), Hyderabad (51), Pune (9).

What verification roles keep asking for: Python (17%) — counted across their open postings here.

Design Verification Engineer jobs in India · Perl jobs · Python jobs

ADCI - BLR 14 SEZ has 67 open roles listed here.

Counted across 14 company job boards, updated as roles open and close.

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  1. Why do you want to join ADCI - BLR 14 SEZ?
  2. What is your experience with Perl? Tell me one thing you learned the hard way.
  3. What do you do when a production issue happens on your code?
  4. Walk me through a system you built. How was it designed, and what would you change now?
  5. Tell me about a hard bug you tracked down. How did you find the cause?

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As a Design Verification (DV) Engineer, you will be part of an advanced architecture team that is exploring new hardware designs to improve our devices. In this role, you will be responsible for defining Basic qualifications: - Bachelor's degree in Electrical Engineering or a related field - Experience using multiple verification platforms: UVM test bench, FPGA, emulator, software environments, and system testing - Experience with test plan development, building the necessary test bench infrastructure, developing tests and verifying the design - Experience identifying bugs in architecture, algorithms, functionality, and performance with strong overall debugging skills - Experience verifying at multiple levels of logic from IP blocks to SoCs to full system testing - Experience with industry standard tools and scripting languages (Python or Perl) for automation - Experience in English-language communication skills, both written and verbal - 7+ years or more of practical semiconductor design verification including System Verilog, UVM, assertions and coverage driven verification. - Experience defining verification methodologies - Experience with writing directed/constrained-random tests Preferred: - Master's degree in Electrical or Communications Engineering or a related field - Experience in system-level debugging - Knowledge of SoC architecture - Experience with boot-up and bare metal flows for CPU cores - Strong programming skills in C and scripting skills in Python and/or Perl - Experience with high performance industry standard IO interfaces like AMBA AXI4, USB, MIPI etc. - Experience with PCIE Experience with formal verification - Experience with transaction level modeling Knowledge of FPGA and emulation platforms Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.

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Listed on amazon · posted 2026-05-12. ApplySarthi collects openings and links to application pages; the role is advertised by ADCI - BLR 14 SEZ, not by us.