Staff SOC DFT Engineer
Intel
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This role on the market
186 open soc roles across 36 companies are on ApplySarthi right now, most of them in Bengaluru (27), Pune (11), Delhi NCR (4).
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What soc roles keep asking for: Python (20%), SIEM (12%) — counted across their open postings here.
Intel has 622 open roles listed here.
- Power & Performance Engineer
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- Systems and Solutions Engineerbengaluru
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Counted across 14 company job boards, updated as roles open and close.
Preparing for this interview
Interviews for soc roles keep coming back to Python, SIEM. Practise those questions before you sit with Intel.
Questions you are likely to be asked
- Why do you want to join Intel?
- What is your experience with Python? Tell me one thing you learned the hard way.
- Walk me through a system you built. How was it designed, and what would you change now?
- Tell me about a hard bug you tracked down. How did you find the cause?
- How do you decide what to test, and what does good code review look like to you?
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Practise the Staff SOC DFT Engineer at Intel interview free →Job Details: Job Description: The Role and Impact Are you ready to make a significant contribution to cutting-edge semiconductor designs? As a DFT Design Engineer, you will play a critical role in shaping the testability, debuggability and reliability of complex SoC (System-on-Chip) designs. You will work closely with cross-functional teams, influencing designs from concept to production, and ensuring our products meet the highest quality standards. In this role, you will develop innovative DFT/DFD methodologies, optimize workflow with AI, and enhance post silicon efficiency. Your work will directly impact Intel's ability to deliver world-class semiconductor solutions that advance technology across industries. Key Responsibilities : Develop and implement advanced DFT methodologies for complex SoC designs to maximize test coverage and efficiency. Collaborate with design, verification, and manufacturing teams to define and optimize post silicon strategies and requirements. Integrate DFT/DFD features into RTL and ensure verification of design for testability requirements. Collaborate with post-silicon teams to debug and validate DFT features. Stay current with emerging trends, AI adoption and technologies in DFT/DFD to ensure best practices are incorporated into workflows. Qualifications: Minimum Qualifications : Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field. 5+ years of experience in DFT, SoC design, or related semiconductor design areas. Expertise in RTL design using hardware description languages like Verilog, VHDL, or SystemVerilog. Preferred Qualifications : Familiar with AI application. Familiarity with advanced DFT methods for low-power or high-performance SoC designs. Understanding of industry standards such as IEEE 1687 (IJTAG), 1149.1 (JTAG), or IEEE 1500 (Core Test). Advanced knowledge of industry-standard DFT tools such as Synopsys DFT Compiler, Mentor Tessent, or Cadence Modus. Knowledge of Python or other scripting languages for design automation. Hands-on experience with managing multi-functional teams or complex SoC projects. We are looking for a visionary DFT engineer who thrives in a collaborative and innovative environment, and who is excited by the opportunity to contribute to groundbreaking technology. Join us to shape the future of computing and leave your mark on the world. Job Type: Experienced Hire Shift: Shift 1 (Malaysia) Primary Location: Malaysia, Penang Additional Locations: Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change. * ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
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Listed on workday · posted 2026-09-21. ApplySarthi collects openings and links to application pages; the role is advertised by Intel, not by us.