Sr. Software Engineer

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence Design Systems Inc. is looking for a motivated Software Engineer II: Hardware Verification R&D to work with us in Belo Horizonte, Brazil. At Cadence, we hire and develop leaders and innovators who want to impact the world of technology. Cadence has been nominated as a Great Place to Work globally and in Brazil and is also a Fortune 100 Best Companies to Work For . As a Software Engineer II: Hardware Verification R&D , you will be part of ATPG/DFT and Fault Emulation team in the HSV group in Belo Horizonte, Brazil. On the ATPG/DFT side, we develop a compiler for the STIL language, generating a HW testbench. On the Fault Emulation side, we work with Functional Safety solutions for the emulation environment. The ATPG/DFT and Fault Emulation team works with Palladium , the industry leading Emulation platform based on our proprietary hardware. Working at Cadence is very dynamic, fast-paced, and integrated with other teams all around the world. Job Description: Development of new features requested by customers or Product Engineering team, including the functional specification, code development, unit tests, regression tests, static analysis, performance evaluation, code reviews. Maintenance on the existent features, including bug fixes, refactoring, performance improvement. Work closely with Application Engineering team to provide support for the deployment of the features on customer side. Work closely with Product Engineering and Product Validation teams to specify and test the features. Requirements: Complete bachelor’s in computer science or computer Engineering or equivalent experience. Experience with Software development: 2 years. Knowledge and experience with Object-oriented programming. Knowledge with git, perforce and others. Solid advanced data structures and algorithms knowledge. Knowledge of C++ programming language. Experience with Unix environment. Very good spoken and written English and Portuguese. Nice to have: Experience with compilers. Experience with scripting environments - either Tcl or Python. Knowledge/Experience EDA and VLSI design, including Verilog and VHDL languages. Knowledge about DFT/ATPG flows. Knowledge about ISO26262. Additional Job Details: Employment category: CLT Employment term: 40 hours/week. Competitive benefits. Location: Av Contorno 5800, Belo Horizonte, Minas Gerais Brazil. About Cadence Design Systems: Cadence is the only company that provides the expertise and tools, IP, and hardware required for the entire electronics design chain, from chip design to chip packaging to boards and to systems. We enable electronic systems and semiconductor companies to create innovative products that transform the way people live, work, and play. Our products are used in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. For more information, access http://www.cadence.com We’re doing work that matters. Help us solve what others can’t.