Sr. Memory Layout Design Engineer
Broadcom
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This role on the market
136 open memory roles across 22 companies are on ApplySarthi right now, most of them in Bengaluru (23), Hyderabad (15).
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- WW Specialist Solutions Architect In-Memory, WWSO DataAmazon Web Services Australia Pty Ltd - D81
- WW Specialist Solutions Architect In-Memory, WWSO DataAmazon Web Services Singapore Private Limited
Broadcom has 373 open roles listed here.
- Senior z/OS Systems Programmer
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Counted across 14 company job boards, updated as roles open and close.
Preparing for this interview
136 open memory roles are hiring right now across 22 companies, mostly in Bengaluru — so the questions repeat. Practise them before you sit with Broadcom.
Questions you are likely to be asked
- Why do you want to join Broadcom?
- Tell me about a hard bug you tracked down. How did you find the cause?
- How do you decide what to test, and what does good code review look like to you?
- Describe a time a deadline forced a trade-off in quality. What did you choose and why?
- How would you design an API for a feature you have worked on?
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Practise the Sr. Memory Layout Design Engineer at Broadcom interview free →Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Job Requirements: - Minimum 8 years of experience with strong layout knowledge - Bachelor's degree required. - Proficiency in using Cadence tools (virtuotso layout, layotu XL, Cadence schematic capture, and verification tools - CALIBRE & Hercules). - Strong layout knowledge in submicron processes (e.g. 7nm, 5nm, 3nm, 2nm). - Experience in digital layout (Standard cell, Memory, I/O); analog layout experience is a plus. Job Description: - Understand and apply layout guidelines, new process rules, and technical requirements for good quality layout. - Manage scheduling, timelines, and layout floor-planning. - Responsible for start to end deliverables with quality within the planned schedule. - Adapt quickly to new methodologies, remain open to new ideas, and communicate effectively with the SOC/library team. - Able to think and help in layout scripting and automation Skill Set (Memory): - Strong experience in Memory layout design and physical verification (LVS, DRC, ERC, Antenna, ElectroMigration) in CMOS processes. - Experience with Cadence Layout tools (VIRTUOSO XL, VXL, or EXL) and CALIBRE verification tools. - Proficiency in floor-planning, hierarchy layout, and chip integration. - Understanding of memory architecture, RC requirement, ability to plan signal and power, based on the layout guidelines - Knowledge of AI, automation in layout, Script Programming and SKILL Programming - Ability to lead, train junior engineers, and manage projects effectively. - Good knowledge of memory layout topology; experience with memory compilers is a plus. - Ability to lead new technology reviews to document layout methodologies, flows, and guidelines. - Self-reliant with the ability to work both independently and collaboratively. Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law. If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
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Listed on workday · posted 2026-08-28. ApplySarthi collects openings and links to application pages; the role is advertised by Broadcom, not by us.