ApplySarthi

Senior Mask Layout Design Engineer

Nvidia

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166 open layout roles across 22 companies are on ApplySarthi right now, most of them in Hyderabad (37), Bengaluru (15).

What layout roles keep asking for: Python (22%), Perl (14%), Linux (13%) — counted across their open postings here.

Deep learning jobs · Perl jobs · Python jobs

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Preparing for this interview

Interviews for layout roles keep coming back to Python, Perl, Linux. Practise those questions before you sit with Nvidia.

Questions you are likely to be asked

  1. Why do you want to join Nvidia?
  2. What is your experience with Deep learning? Tell me one thing you learned the hard way.
  3. Walk me through a system you built. How was it designed, and what would you change now?
  4. Tell me about a hard bug you tracked down. How did you find the cause?
  5. How do you decide what to test, and what does good code review look like to you?

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Practise the Senior Mask Layout Design Engineer at Nvidia interview free →

Are you interested in joining our Dynamic team? If yes, We are looking for a Senior Mask Layout Design Engineer – someone who is excited to join a growing group of diverse individuals responsible for handling high-speed mixed-signal circuit designs! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 fueled the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to tackle, that only we can pursue, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. What you'll be doing: Perform physical layout for mixed-signal functions like PLL's, high speed I/O circuits, general I/O's, ESD structures designs in innovative sub-micron CMOS technologies using Cadence tools You'll work with ASIC and mixed-signal engineers to customize designs for integration in VLSI products and Job duties will include floor planning, custom layout and verifying against design rules and schematics. What we need to see: Hold a BSEE or equivalent experience. MSEE is a plus. 8+ years of relevant mask design / layout experience Tape-out experience with FinFET technology is required. Experience with TSMC N5/N4/N3 is preferred. Experience with high-speed SerDes/RF layout design is helpful and Experience with top level integration would be excellent to have. Deep understanding of analog circuit layout concepts in submicron CMOS technologies Validated experience with Cadence custom circuit design tools - particularly virtuoso Experience running and debugging DRC and LVS with verification tools such as ICV/Calibre Ability to work optimally in a team, good interpersonal skills and positive energy. Proficiency in scripting languages like perl, python, skill etc. is a plus Knowledge of DRC and LVS checking flows, ability to customize DRC and LVS decks Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 132,000 USD - 207,000 USD for Level 4, and 148,000 USD - 235,750 USD for Level 5. You will also be eligible for equity and benefits . Applications for this job will be accepted at least until October 10, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

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Listed on workday · posted 2026-10-06. ApplySarthi collects openings and links to application pages; the role is advertised by Nvidia, not by us.