Senior Engineer, Analog Design Engineering

About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X . The Consumer Group at ADI is exponentially expanding its activities and engagements, growing its battery power solutions to further complement its existing mixed-signal products, using 90nm and lower geometry, CMOS Analog Power Process technologies. The Business: ADI’s Personal Electronics Solutions (PES) business has been a key provider of high-volume consumer silicon solutions for the last decade, developing key products that enable highly precise human interpretation and sensory assistance. As part of a long sustainable growth plan, we are expanding our team, supporting the development of highly integrated power solutions and PMICs. PES BU will present the successful candidate a great opportunity for continuous career development as part of a highly motivated and supportive worldwide engineering team. The Team: Personal Electronics Solutions (PES) Team is primarily focused on PMIC and hybrid mixed signal / power developments, for High-End / High-Volume electronic devices, such as Smartphones, Tablets and Consumer Accessories. PES Milan Team is expanding its focus in Power Solutions, across a broad range of IC engineering profiles and levels of experience, including Analog Designer, Digital Designer, Mixed-Signal Designer, Verification Engineer, Validation Engineer and Layout Designer. The Position: Analog Devices, Inc. is looking for a P3 – Senior Engineer to join our Team. The candidate will be self-motivated, willing to learn exciting new technologies and develop new products, but also be able to work effectively within a talented group of individuals across multiple development locations. The candidate will join a team of Analog, Digital, Mixed-Signal CMOS designers, Mask Layout designers, Verification and Validation engineers, Algorithm and Software developers, Packaging and Test engineers, implementing PMIC state of the art. The candidate will be involved in the following developments, from definition to production: LDO, BUCK, BOOST, BUCK-BOOST, CHARGE-PUMP, SIMO (Single-Input / Multiple Outputs), IBB (Inverted BUCK-BOOST) Oscillators, PLL, Bandgap, References, ADC, DAC, I/O, OTP, MTP, DFT Responsibilities: Power IP Development Contribute to the definition and the design of complex Power IPs Power Management IC Development Execute on PMIC design, pre-silicon verification and post-silicon validation Provide guidance to physical design layout team Technical Customer Interface Engagement Participate in customer engagements, in support of technical feasibility IC Development Weekly meetings / IC Milestone Workshops Human Resources Enable a culture of continuous learning and improvement Support project management, task planning and schedule Minimum Qualifications & Experience: Degree in Electrical Engineering, Computer Science, or Computer Engineering, with 3+ years of experience IP Analog Design experience Solid technical and analytical background, with good problem-solving skills Good team worker with multi-discipline Good understanding of Mixed-Signal Design Flow and Top-Down development methodology Good understanding of Power IP Topologies Analog Functional and Parametric Verification Process - Voltage - Temperature (PVT) Corners, Layout Parameter Extraction (LPE) Simulations Good written and verbal communication Preferred Qualifications & Experience: Proficient with Cadence Suite (Virtuoso ADE Spectre) Scripting languages HDL programming languages (Verilog / System Verilog) Analog Behavioral Models (Verilog-A, Verilog-AMS, Wreal, SystemVerilog, EEnet) Mixed-Signal Verification methodology and tools (AMS / APS / Flex) Experience in high-voltage low geometry process technology Lab silicon bring-up and Production Test support experiences The pay range for this position in Milan is €40,810 to €59,095. This range may change if you are hired in another location. The stated range may be inclusive of several levels within this role and will be narrowed during the interview process based on a number of factors, including the candidate's experience, qualifications, and specific location. Applicants interested in this role who are not located in the primary location may request the applicable pay range for their location during the interview process if an alternative location is an option. This position qualifies for a discretionary performance-based bonus, the criteria for which are based on company factors and will be shared during the recruitment process. This role may also be eligible for variable compensation, paid annual leave, and supplemental benefits as applicable under local policy and the terms and conditions of employment. #LI-CC1 For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process. Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group. Job Req Type: Experienced Required Travel: Yes, 10% of the time Shift Type: 1st Shift/Days