Senior Analog RF Design Engineer

As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We’re a technology company that leads with our humanity—driving our business priorities alongside meaningful social, community, and societal impact. What will you do at Ciena? This individual will contribute to the development of broadband RF driver and transimpedance amplifiers for Ciena’s WaveLogic programs. The candidate will work as part of a larger team and be responsible for design, mixed-signal simulation, lab test and verification of the broadband amplifier ASICs. Responsibilities: Design of RF drivers, TIAs and associated building blocks in BiCMOS technologies Work with layout resources to implement design intent and verify work performed Perform some critical layout when needed using the cadence tool suit (layout L, XL, GXL) and Mentor layout verification tools (Calibre LVS, DRC, PEX, etc.) Perform RF circuit simulations with the Cadence tool suit (virtuoso, ADE, maestro, etc.). Perform mixed-signal simulation with cadence AMS Perform lab measurements for VR, debug and back-simulations Communicate requirements to layout engineers and provide feedback as needed. Provide feedback on circuit requirements and work with the system group to find the best compromises Present written reports and presentations at group meetings of work performed (i.e., design, simulations, measurements, etc.) Must Haves: Minimum: Master’s degree in electrical engineering or equivalent A track record of developing RF analog circuits for the telecom industry with 5-10 years of experience High-speed RF circuit design experience including one or more of the following: Distributed RF broadband amplifiers, Lump element RF amplifiers or TIAs. Mixed-signal simulation with cadence AMS or Mentor symphony Op-amp design experience Design experience in BiCMOS Experienced with the Cadence design flow Experienced with 3D and 2-1/2D simulators such as HFSS, EMX, Momentum, etc. On Wafer, die and module testing and debugging using probe stations, VNAs, spectrum analyzers, etc. Nice to Have: Design experience in CMOS and SiGe Pay Range: The annual salary range for this position in Ottawa is $114,000 - $182,000 Pay ranges at Ciena are designed to accommodate variations in knowledge, skills, experience, market conditions, and locations, reflecting our diverse products, industries, and lines of business. Please note that the pay range information provided in this posting pertains specifically to the primary location, which is the top location listed in case multiple locations are available. Non-Sales employees may be eligible for a discretionary incentive bonus, while Sales employees may be eligible for a sales commission. In addition to competitive compensation, Ciena offers a comprehensive benefits package, including medical, dental, and vision plans, participation in 401(K) (USA) & DCPP (Canada) with company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company-paid holidays, paid sick leave, and vacation time. We also comply with all applicable laws regarding Paid Family Leave and other leaves of absence. At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard. Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination. Ciena is an Equal Opportunity Employer, including disability and protected veteran status. If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.