IC Design Engineer (DFT)
Broadcom
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This role on the market
3,614 open design roles across 340 companies are on ApplySarthi right now, most of them in Bengaluru (325), Hyderabad (124), Chennai (52).
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What design roles keep asking for: Python (20%) — counted across their open postings here.
Broadcom has 408 open roles listed here.
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Counted across 14 company job boards, updated as roles open and close.
Preparing for this interview
Interviews for design roles keep coming back to Python. Practise those questions before you sit with Broadcom.
Questions you are likely to be asked
- Why do you want to join Broadcom?
- What do you do when a production issue happens on your code?
- Walk me through a system you built. How was it designed, and what would you change now?
- Tell me about a hard bug you tracked down. How did you find the cause?
- How do you decide what to test, and what does good code review look like to you?
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Practise the IC Design Engineer (DFT) at Broadcom interview free →Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Broadcom offers an excellent opportunity to contribute to a team environment and to grow personal career path. You will be working with internal and external customers to develop state of the art IC solutions utilizing Broadcom's leading edge CMOS cell-based ASIC technologies. You will have responsibility for ASIC designs through all of the key development and implementation phases including RTL analysis, synthesis, design optimization, timing verification, simulation, test insertion, physical design, vector generation, and post-prototype test support. Candidates will have opportunity to work on the latest 5nm/3nm designs Responsibilities: Participate in chip level DFT architecture definition. Implement basic DFT schemes, including scan, boundary scan, MBIST, Logic BIST and SSN Verify all DFT logics and test patterns with simulation Test modes static timing analysis Participate in ATE bring-up and debug the DFT patterns on ATE. Requirements/Qualifications: Either Bachelor or Master degree, 5+ years related experience required. Good understanding of the General DFT methodology such as BIST, SCAN, JTAG and ATPG Be familiar with basic Mentor/ Synopsys DFT flow and tools Experience in developing constraints for synthesis/STA Multi-mode, multi-corner STA experience, Understanding Sign-Off Checks Education/Certifications Preferred Degree: MS Preferred Major: Microelectronics or related discipline Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law. If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
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Listed on workday · posted 2026-11-03. ApplySarthi collects openings and links to application pages; the role is advertised by Broadcom, not by us.