DFT Senior Engineer
Broadcom
Broadcom is also hiring for this role in Bengaluru, Bengaluru.
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This role on the market
135 open dft roles across 16 companies are on ApplySarthi right now, most of them in Bengaluru (26), Pune (4), Hyderabad (3).
- Design-for-Test (DFT) Engineer — ASIC Backend – (Associate, Experienced, or Lead)Boeing
- Design / DFT Director (NVE Engineering)Micron
- DFT ATPG EngineerNvidia
- Sr DFT EngineerNxp · hyderabad
- Senior Principal Engineer-DFTMarvell
What dft roles keep asking for: Perl (54%), Python (51%), C++ (18%) — counted across their open postings here.
Broadcom has 408 open roles listed here.
- Senior Custom ASIC Engineering Lead
- Senior/Staff Process Integration Engineer (Optoelectronics)
- Staff Engineerbengaluru
- Memory Layout Design Engineerbengaluru
- Memory Layout Design Engineerbengaluru
Counted across 14 company job boards, updated as roles open and close.
Preparing for this interview
Interviews for dft roles keep coming back to Perl, Python, C++. Practise those questions before you sit with Broadcom.
Questions you are likely to be asked
- Why do you want to join Broadcom?
- What is your experience with Perl? Tell me one thing you learned the hard way.
- Describe a time a deadline forced a trade-off in quality. What did you choose and why?
- How would you design an API for a feature you have worked on?
- What do you do when a production issue happens on your code?
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Practise the DFT Senior Engineer at Broadcom interview free →Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: The candidate would be required to work on various phases of SoC DFT related activities for Broadcom APD (ASIC Product Division)'s designs - DFT Architecture, Test insertion and verification, Pattern generation, Coverage improvement, Post silicon debug and yield improvement to meet the product test metrics. It involves working with the Physical Design & STA team for DFT mode timing closure. The role could also involve direct interaction with external customers. The candidate should have in-depth knowledge of DFT concepts and should be experienced in various aspects of DFT -ATPG, MBIST & IJTAG. The candidate should have worked on DFT insertion & verification, pattern generation, coverage improvement, vector simulation, post-silicon debug. Strong problem solving & debugging skills are a must. Expertise in scripting languages such as perl, shell, etc. is an added advantage. Experience with either Mentor Graphics DFT tools (Tessent Shell) is highly desirable. The candidate should have worked with team across multiple geographies. The candidate should be able to handle his/her work independently. The candidate should possess excellent communication skills. Educational qualification & Experience Level : Bachelor's degree with 5+ years of relevant experience or Master's degree with 3+ years of relevant experience Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law. If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
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Listed on workday · posted 2026-11-02. ApplySarthi collects openings and links to application pages; the role is advertised by Broadcom, not by us.