AI/ML Layout Engineering Intern (Winter 2027)

As the global leader in high-speed connectivity, Ciena builds the critical infrastructure powering the AI era. We’re a technology company shaping the future of networking, guided by innovation, integrity, and collaboration. Through development opportunities, meaningful work, and flexibility, Ciena supports growth and well-being—on and off the job. Connect with a career that matters. The Opportunity: Work term of 4 months starting in January 2027. The CAD team works with CAD engineers and RFIC designers to turn AI-assisted layout ideas into practical tools for engineering design. The work focuses on building and evaluating prototypes such as DRC-clean parameterized layout generators or surrogate models that predict layout results without a full verification run. The role emphasizes careful data preparation, evaluation against designer-created layouts, and delivery of code and written evaluation that the team can continue to use. How you will make an impact: Prototype machine learning and optimization methods for placement, routing and layout synthesis of RFIC and analog blocks. Build layout generators, including parameterized cells (PCells), that follow geometry, topology and foundry design rules. Build surrogate models and design-space-exploration frameworks so designers can compare options without running every candidate through the full flow. Own the data pipeline end to end, including generating layout datasets, training models and measuring the results. Write well-tested software components in Python and C++. Test results on real design problems with RFIC designers and CAD engineers, and report clearly where AI helps and where it does not. The must haves: Education: Actively enrolled in a Master’s or PhD program in Electrical Engineering, Computer Engineering, Computer Science, EDA/CAD, Applied Mathematics or a related field, A Python project you built, such as research code, a course project or an open-source contribution, that you can walk us through. Experience training and evaluating at least one model with PyTorch, TensorFlow or scikit-learn. Coursework or project experience with data structures, algorithms and object-oriented programming. Interest in applying AI and machine learning to engineering design automation. Nice to haves: Experience with C++. Experience with Cadence Virtuoso, SKILL or PCell development. Coursework or project experience in analog/RF IC design or layout, including DRC and LVS. Experience with graph neural networks or reinforcement learning. Coursework or project experience in computational geometry. Development experience with Git and Linux. Pay Range : The pay range for this position is $25.50 - 43.00. Pay ranges at Ciena are designed to accommodate variations in knowledge, skills, experience, market conditions, and locations, reflecting our diverse products, industries, and lines of business. Please note that the pay range information provided in this posting pertains specifically to the primary location, which is the top location listed in case multiple locations are available. In addition to competitive compensation, Ciena offers students access to the Employee Assistance Program (EAP), company-paid holidays, paid sick leave, and vacation pay as required by applicable laws. At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard. Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination. Ciena is an Equal Opportunity Employer, including disability and protected veteran status. If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.