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ADCE Packaging Design Architect

Intel

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321 open packaging roles across 58 companies are on ApplySarthi right now, most of them in Bengaluru (7), Mumbai (3), Hyderabad (3).

What packaging roles keep asking for: Supply chain (27%), Python (14%) — counted across their open postings here.

Intel has 1,002 open roles listed here.

Counted across 14 company job boards, updated as roles open and close.

Preparing for this interview

Interviews for packaging roles keep coming back to Supply chain, Python. Practise those questions before you sit with Intel.

Questions you are likely to be asked

  1. Why do you want to join Intel?
  2. Tell me about design feedback you disagreed with. What happened?
  3. How do you test a design with users before it is built?
  4. How do you work with developers so the build matches the design?
  5. How do you balance what users ask for with what the business needs?

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Job Details: Job Description: Drives end-to-end development for substrate design from concept through tape out and implements physical layout and routing of the package design. Performs substrate fit and routing studies to establish design, performance, and cost tradeoffs. Works closely with silicon and hardware teams to optimize silicon-package-board performance and pinout. Defines substrate design rules, conducts internal and external reviews, analyzes data, and resolves DRCs to optimize package design. Completes documentation and collateral into the product lifecycle management system of record. Required Skills and Experience: Self-motivated engineer who has strong technical background in design and electrical analysis. Solid background in semiconductor fabrication and packaging Strong analytical ability and problem-solving skills: identifying, isolating, and debugging issues and providing creative solutions. - Ability to work independently and at various levels of abstraction Strong organization, time management, and communication skills, self-motivated. Experience with design and electromagnetic simulation tools: Mentor, Cadence tools, SPICE, Ansys tools etc. Experience in Cadence Allegro platform tools (PCB Editor, Advanced Package Designer, APD/SiP, Concept HDL, Sigrity), and/or Mentor Xpedition platform tools (PCB Layout/XPD, Designer, Hyperlynx). Experience and knowledge with assembly process, test and characterization techniques preferred Qualifications: Ph.D./master’s in electrical engineering/ chemical engineering/ mechanical engineering or Material Science. 10+ years and in-depth knowledge/background in Package, PCB design, or IC digital design. Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, Arizona, Phoenix Additional Locations: US, California, Folsom, US, California, Santa Clara, US, Colorado, Fort Collins, US, Massachusetts, Beaver Brook, US, New Mexico, Albuquerque, US, Oregon, Hillsboro, US, Texas, Austin, US, Washington, Multiple Cities Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel . Annual Salary Range for jobs which could be performed in the US: $220,920.00-311,890.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. Work Model for this Role This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.The application window for this job posting is expected to end by 06/09/2026 * ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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Listed on workday · posted 2026-10-14. ApplySarthi collects openings and links to application pages; the role is advertised by Intel, not by us.