Senior Signal Integrity Engineer
Graphcore
Make my CV for this job, freeView job and applyYour CV, rewritten for this role using only your real experience. Sign in with Google and upload your CV. Nothing to install.
Skills named in this job
Read from the description itself, not inferred.
This role on the market
111 open integrity roles across 38 companies are on ApplySarthi right now, most of them in Bengaluru (5), Hyderabad (4).
- Director Payment IntegritySIHO Insurance Services
- Signal & Power Integrity Engineer, Amazon LeoAmazon Kuiper Manufacturing Enterprises LLC
- Applied Scientist - GenAI, Trust and Store Integrity ScienceAmazon.com Services LLC
- Payment Integrity Prepay Fraud Supervisor - Cigna HealthcareCigna
- Electro-optical Signal IntegrityMarvell
What integrity roles keep asking for: SQL (26%), Python (23%), R (13%) — counted across their open postings here.
Graphcore has 180 open roles listed here.
- Director Of Product Engineering
- Systems Engineer
- Senior System Tests & Diagnostics Engineer
- Staff PCB Layout Engineer
- Staff System Tests & Diagnostics Engineer
Counted across 14 company job boards, updated as roles open and close.
Preparing for this interview
Interviews for integrity roles keep coming back to SQL, Python, R. Practise those questions before you sit with Graphcore.
Questions you are likely to be asked
- Why do you want to join Graphcore?
- What is your experience with System design? Tell me one thing you learned the hard way.
- Describe a time a deadline forced a trade-off in quality. What did you choose and why?
- How would you design an API for a feature you have worked on?
- What do you do when a production issue happens on your code?
Prep Sarthi gives you a free mock interview: an AI interviewer asks you questions like these out loud, from your own CV and this job, and shows your score and your weakest answer.
Practise the Senior Signal Integrity Engineer at Graphcore interview free →1671
About the Role
We are seeking a Senior Signal Integrity Engineer to develop, validate, and optimize high-speed signaling solutions across blade- and rack-level architectures for advanced compute platforms. This role sits at the intersection of silicon, package, interconnect, board, and system design, with a strong emphasis on hands-on measurement, simulation correlation, and cross-functional technical communication.
Key Responsibilities
- End-to-end signal integrity analysis for blade- and rack-level system architectures.
- Analyze and optimize high-speed and low-speed I/O interfaces, including PCIe Gen4/5/6, Ethernet, DDR, SerDes, SPI, I2C, etc. and related interconnects.
- Perform time-domain and frequency-domain simulations using tools such as Ansys HFSS, Keysight ADS, Cadence Sigrity, CST, SPICE, or similar.
- Support hands-on lab validation using VNA, TDR, BERT, and high-speed oscilloscopes.
- Correlate simulation results with lab measurements to identify margin gaps, debug issues, and improve design methodology.
- Collaborate with silicon, package, board, connector, cable, and system design teams to optimize I/O channel performance.
- Work with interconnect vendors and ODMs to guide board layout, stack-ups, routing rules, and system design decisions.
- Review schematics, layouts, simulation results, and validation data for blade, backplane, and rack-level hardware.
- Prepare and communicate clear validation reports, measurement summaries, debug findings, and technical recommendations to internal teams, vendors, and senior technical stakeholders.
Required Qualifications
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
- Strong experience in signal integrity for high-speed digital systems.
- Hands-on measurement expertise using VNAs, TDRs, BERTs, and high-speed oscilloscopes.
- Experience measuring and analyzing S-parameters, impedance profiles, eye diagrams, jitter, timing margins, insertion loss, return loss, and crosstalk.
- Knowledge of high-speed interfaces such as PCIe Gen4/5/6, Ethernet, DDR, SerDes, and related I/O technologies.
- Experience with SI/PI simulation tools such as HFSS, ADS, Sigrity, CST, SPICE, or equivalent.
- Ability to correlate lab measurements with simulations and use data to guide design decisions.
- Strong communication skills, including the ability to produce clear validation reports, present technical findings, and work effectively across multi-functional engineering teams.
Preferred Qualifications
- Experience in hyperscale, data center, cloud infrastructure, or advanced compute hardware environments.
- Experience with blade, backplane, board-to-board, cable, or rack-level interconnect architectures.
- Knowledge of thermal and mechanical considerations that impact SI/PI performance.
- Experience with calibration, de-embedding, fixture design, lab automation, or measurement methodology development.
- Experience using Python, MATLAB, or similar scripting languages for simulation automation, measurement automation, and data analysis.
Tools / Technologies
Measurement: VNA, TDR, BERT, high-speed oscilloscopes
Simulation: Ansys HFSS, Keysight ADS, Cadence Sigrity, CST, SPICE
Interfaces: PCIe Gen4/5/6, Ethernet, DDR, SerDes, SPI, high-speed interconnects
Analysis: S-parameters, eye diagrams, jitter, timing margins, impedance control, crosstalk, insertion loss, return loss, de-embedding, measurement-to-simulation correlation
Why Join Us
This is an opportunity to work on complex, high-performance compute platforms while partnering with experienced technical leaders, ODMs, and interconnect vendors. You will play a key role in defining, measuring, validating, and optimizing next-generation system-level I/O performance.
USA Benefits
In addition to a competitive salary, Graphcore offers flexible working and a comprehensive benefits package designed to support your health, wellbeing and financial future. Our benefits include medical, dental and vision coverage, Flexible Spending Accounts (FSAs), Health Savings Accounts (HSAs), disability and life insurance, a 401(k) retirement plan, commuter benefits, wellness services and an Employee Assistance Programme (EAP). We welcome people of different backgrounds and experiences; we're committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments.
Match this job to your CV
ApplySarthi scores your CV against this role, shows the skills you are missing, and writes a tailored version for the application.
Check my match →Similar open roles
- Director / Senior Principal AI SoC Validation (Bring-up lead)Graphcore · bengaluru
- Power & Performance Validation EngineerGraphcore · bengaluru
- Principal Debug Validation EngineerGraphcore · bengaluru
- Principal Embedded SW/FW Engineer (Bringup) - Bengaluru, multiple vacancies Graphcore · bengaluru
- Principal Execution & QA Validation EngineerGraphcore · bengaluru
- Principal Power & Performance Validation EngineerGraphcore · bengaluru
- Principal Silicon Verification Engineer - BengaluruGraphcore · bengaluru
- Senior DDR & Execution Validation EngineerGraphcore · bengaluru
Need answers during your interview? Try Live Sarthi.
Live Sarthi, an Interview Sarthi app, shows answer suggestions during the call.
- Hidden from supported screen sharingThe overlay stays out of supported Windows screen captures.
- Answers start in about 1.5 secondsResponse time varies with your connection and model.
- From your own CVYour projects and your experience, not a generic script.
- 30 minutes freeThen ₹99 for a 2-day pass with unlimited calls — you pay for the days you are interviewing, not a subscription.
A Windows app, from the same team as ApplySarthi.
Listed on greenhouse · posted 2026-06-15. ApplySarthi collects openings and links to application pages; the role is advertised by Graphcore, not by us.